Current enterprise-level mass storage relies on hard drives that are typically characterized by a 3.5″ form factor, a 15,000 rpm spindle motor and a storage capacity between 73 GB and 450 GB. The mechanical design is identical to the traditional hard drive with a single actuator and 8 read/write heads moving across 8 surfaces. The constraints of the head/media technology limit the read/write capabilities to only one active head at a time. All data requests sent to the drive are handled in a serial manner with long delays between each operation as the actuator moves the read/write head to the required position and the media rotates to place the data under the read/write head.
As a result of the queue of requests waiting for the actuator, the system sees response times increasing to the point where it becomes intolerable to users. Mass storage systems have adapted to this problem by limiting the number of outstanding requests to each drive. This has had the effect of reducing the effective and usable capacity of each drive to as low as 12 GB per drive, even though these devices are available at up to 450 GB capacities. The lower capacity, in turn, has exacerbated floor space, cooling and power issues, all of which have become extremely problematic for enterprise-level mass storage systems.
In an attempt to relieve these problems, the industry is moving towards 2.5″ drives. However, although the smaller form factor allows for a larger number of drives in the same space, the serial nature of hard drive operations means that even smaller form factor drives present serious space, cooling and power problems.
Flash memory is attractive in an enterprise mass-storage environment, since flash memory systems do not have the mechanical delays associated with hard drives, thereby allowing higher performance and commensurately lower cost, power, heating and space usage. Nevertheless, flash memory has not traditionally been used in such environments due to certain technical constraints.
The first technical problem is write speed, which may be as slow as one-tenth that of a mechanical hard drive. This results from the fact that data cannot be overwritten on a NAND flash device without a long erase cycle prior to the write. Because the erase cycle directly affects the write performance, most flash designs move the write data to a new location and delay the erase until later. In a busy system, delayed erase cycles may build up until the processor runs out of free flash pages and has to stop to create new ones, thereby significantly affecting system performance.
The second technical problem is the specified limit for each flash memory page of 100,000 erase cycles for Single Level Cell (“SLC”) devices and 10,000 cycles for Multi-Level Cell (“MLC”) devices. These pose particular problems for datacenters that operate with unpredictable data streams that may cause “hot spots,” resulting in certain highly-used areas of memory being subject to a large number of erases.
The third issue is data loss, which can occur as the result of various factors affecting flash memory, including read disturbs or program disturbs, which lead to the loss of data bits caused by the reading or writing of memory cells adjacent to the disturbed cell. The state of a flash memory cell may also change in an unpredictable manner as the result of the passage of time. These technical problems create serious issues for the use of flash memory in high-capacity, high-performance storage applications. In each case, technical solutions exist, but the solutions place significant strain on the processing power available in standard flash memory controllers, which generally include a single processor. That strain makes it difficult to overcome these technical problems in these environments.